Electronics Weekly

LETI integrates III-V lasers on 200mm wafers using CMOS flow

Leti has integrated hybrid III-V silicon lasers on 200mm wafers using standard CMOS process flow. This shows the way to transitioning away from 100mm wafers and a process based on bulk III-V ...
EDN

Mixed-signal design flow enables RF CMOS chip

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...
Electronic Design

Simplified High-k/Metal-Gate Process Increases Planar CMOS Speed

IMEC, the Belgium-based nanotechnology research center, announced at this week's VLSI Symposium that it has improved the performance of its planar CMOS using hafnium-based, high-k dielectrics and ...
Electronic Design

IEDM sees transistor, memory, laser innovations

The International Electron Devices Meeting (IEDM) held Dec. 2-6, 2017, in San Francisco offered imec and Leti an opportunity to disclose several innovations. imec announced three new developments: ...
EDN

InGaP HBT vs CMOS for mobile handset power amplifiers

Designers of mobile handsets and wireless networking products know that the power amplifier (PA) is a make or break component in terms of performance, footprint, and battery life. Selecting the right ...