EDN

PLL Subsystem architectures for SoC design

Because of the cornerstone importance of PLLs to an SoC design, this article considers the various challenges in the design of PLL subsystems, and discuss architectural solutions. The PLL subsystem is ...
Electronic Design

Smaller PLL Synthesizers Become Design-Friendlier

Phase-locked-loop (PLL) frequency synthesizers are signal sources often employed in many types of electronic equipment. They show up as clock sources in high-frequency instruments and as local ...
EDN

Tracking PLL design through the decades, part 2

The desire to integrate more gateshas driven two advances in CMOS-processingtechnology, enabling the integrationof practical inductors in genericCMOS-logic processes. The first, theuse of CMP ...
Design-Reuse

ParthusCeva announces extensive upgrade to PLLXpert online and the addition of TSMC 0.13um PLL Compilers

San Jose, Calif - 15 April, 2003. - ParthusCeva, Inc. (NASDAQ: PCVA; LSE: PCV), the industry's leading provider of licensable Digital Signal Processor (DSP) cores and platform-level IP solutions to ...